1. Field of Invention
The present invention relates to level shifting circuit. More particularly, the present invention relates to level shifting circuit with dynamic control.
2. Description of Related Art
Level shifting circuit is generally used to amplify the signal with small voltage range to a signal with larger voltage range. For example, a data signal with voltage range of 0V to 1V is shifted to a data signal with voltage range of 0V to 10V.
FIG. 1 is a drawing, schematically illustrating a conventional level shifting circuit. In FIG. 1, the conventional level shifting circuit 100 is composed of two N-type MOS (NMOS) field effect transistors M1 and M2 of and two P-type MOS (PMOS) field effect transistors M3 and M4. Two gates of the transistor M1 and the transistor M2 are respectively receiving a pair of input data IN and IN′, which are complementary to each other. Each of the transistors M1 and M2 has two diffusion electrodes, serving as drain electrode or source electrode. The two source electrodes are connected to the ground voltage (GND) and another two drain electrodes output a pair of shifted data signals OUT and OUT′, which are complementary to each other, and are also further connected to two transistor M3 and M4, respectively. The complementary signals have the voltage levels, opposite to each other. The transistor M3 and M4 form a cross-coupled structure. Two diffusion electrodes of the transistors M3 and M4 are connected to a high level voltage VDDH. Here, the high level voltage VDDL of the input data signals IN and IN′ would be shifted to VDDH. In other words, the input data signals with the voltage range between VDDL and GND is shifted and output as the output data signals with the voltage range between VDDH and GND. VDDL is smaller than VDDH.
An initial state for the conventional level shifting circuit 100 as an example is IN=GND, IN′=VDDL, OUT=GND, and OUT′=VDDH. When the input data signal IN is changed to VDDL and the input data signal IN′ is changed to GND, the transistor M1 is conducted and the transistor M2 is OFF. The output voltage maintains at the GND voltage, so the P-type transistor M3 is also conducted. This would cause a large short-circuit current, flowing to the ground GND through the transistors M3 and M1.
The foregoing conventional level shifting circuit 100 would increase the power consumption in the system due to the short circuit current.